HWiQ 2025
2025 NSF Workshop of Hardware Security in the Era of Quantum Computing & Post-Quantum Cryptography. Alexandria, VA, March 3-4, 2025.
Organizers (Co-Chairs)
- Dr. Jiafeng Xie — Villanova University. Email: [email protected]
- Dr. Michel Kinsy — Arizona State University. Email: [email protected]
Executive Summary
With the NIST Post-Quantum Cryptography (PQC) standardization process advancing and quantum computing development accelerating, there is an urgent need to explore hardware-centric security concerns and solutions to ensure PQC and quantum computers are safe and efficient. This NSF Workshop on Hardware Security in the Era of Quantum Computing & Post-Quantum Cryptography (HWiQ) addresses critical challenges and opportunities in hardware security as we transition into the quantum computing era.
Key outcomes of the 1.5-day workshop:
- Gathered leading experts and researchers to present recent findings.
- Discussed future research directions in hardware security for PQC and quantum computing.
- Produced recommendations and strategies for funding agencies to strengthen related U.S. research.
Workshop Agenda & Structure
- Invited 13 researchers from universities, industry, and NIST to deliver keynote and speaker sessions.
- The workshop lasted one and a half days.
- Two keynote talks (45 minutes each) and three speaker sessions (20 minutes per speaker).
- Three panel discussions (≈1 hour each) followed the speaking sessions.
- Coffee breaks and networking sessions were included; talks and discussions were recorded.
Keynotes
- Hardware security in the quantum world — Dr. Sanjay (Jay) Rekhi (NIST)
- Quantum computer cybersecurity — Dr. Jakub Szefer (Northwestern University)
Speaker sessions (lightning talks)
- Novel implementation for PQC (3 speakers)
- Side-channel and related issues for PQC (4 speakers)
- Quantum computing and PQC security (4 speakers)
Slides and recordings: Google Drive
Key Discussions and Outcomes
Below is a summary organized according to the workshop program.
(i) Opening keynote — Dr. Sanjay Rekhi (NIST)
Dr. Rekhi presented on hardware security in the quantum world, covering NIST’s PQC standardization process, related research activities, and resources. He highlighted small-business programs supporting hardware security for quantum computing and PQC.
(ii) Speaker Session I — Novel Implementation for PQC
- Michael Bowler (Synopsys) — Agile PQC coprocessor architecture supporting multiple PQC algorithms.
- Yingjie Lao (Tufts University) — Efficient hardware design based on fast algorithms and architectures for polynomial multiplication in lattice-based PQC.
- Patrick Schaumont (WPI) — Secure PQC chip design from an EDA and automation perspective.
(iii) Panel Discussion I (moderated by Michel Kinsy)
Topics included:
- Lightweight PQC algorithms and research directions.
- PQC hardware design and testing from academic and industry perspectives.
- Side-channel prevention starting from EDA tools.
- Open-source PQC designs, academia–industry collaboration, ASIC design for PQC, and tapeout-related attacks.
(iv) Speaker Session II — Side-Channel and Related for PQC
- Nimisha Limaye (Synopsys) — Side-channel countermeasures for PQC multiplications.
- Daniel Dinu (Intel) — Implementation security and deployment considerations (example: ML-DSA).
- Reza Azarderakhsh (Florida Atlantic University) — Challenges in secure hardware implementations for PQC.
- Xinmiao Zhang (The Ohio State University) — Architectures for efficient and low-latency implementations of code-based PQC.
(v) Panel Discussion II
Main focus areas:
- Algorithmic innovations to improve PQC performance.
- AI-assisted (e.g., LLM) side-channel attacks and defenses.
- Portability of attacks/countermeasures across devices.
- Industry alignment and small-business experience sharing.
- Public education on PQC and quantum security.
(vi) Keynote II — Dr. Jakub Szefer (Northwestern University)
Dr. Szefer discussed quantum computer cybersecurity, covering recent work and future directions, with emphasis on cloud-based operation scenarios, information leakage, side-channel attacks, and defenses.
(vii) Speaker Session III — Quantum Computing and PQC Security
- Weiwen Jiang (George Mason University) — Privacy and security preservation for quantum computing.
- Aydin Aysu (North Carolina State University) — Side-channel attacks targeting NIST PQC candidates.
- Himanshu Thapliyal (University of Tennessee, Knoxville) — Quantum computing in cyber-physical systems and attack-resilient circuit design.
- Gang Qu (University of Maryland) — Efficient side-channel attacks for number theoretic transform (NTT) used in lattice-based PQC.
(viii) Panel Discussion III (moderated by Michel Kinsy)
Topics included:
- Involving quantum centers and design automation.
- Hardware security starting points in quantum computing (e.g., simulation vs. real hardware access).
- Need for increased PQC security research investment (education, EDA simulation tools).
- Projected impact of hardware security on PQC and quantum computing in coming years.
(ix) Closing remark — Dr. Qiaoyan Yu (NSF)
Dr. Yu emphasized the workshop goals, highlighted key discussions, and encouraged cultivating a strong U.S. research community, continuing the workshop in future years, strengthening infrastructure and education, and facilitating sharing among peers.
Summary of Key Discussion Points
- PQC standardization process and updates
- PQC hardware implementation (agility, algorithmic innovation, architecture)
- Side-channel attacks and countermeasures for PQC (EDA tools, circuit-level innovation, sensitivity analysis)
- Cybersecurity threats to quantum computing and defenses
- Privacy-preserving techniques for quantum computing
- Future research on hardware security for PQC and quantum computing
Summary of Key Outcomes
- All the invited speakers, panelists, and attendees emphasized the importance of hardware security for PQC and quantum computing.
- Promising research directions were identified across keynote talks, sessions, and panels.
- New research ideas and potential collaborations were initiated among academia and industry.
- Participants urged continued development of the workshop and community-building efforts.
Recommendations & Future Research Directions
- Novel hardware implementations for PQC: agility, algorithmic optimization, new architectures, and lightweight PQC development.
- Expanded research into side-channel analysis for hardware PQC: classical countermeasures, threat modeling, ML-assisted side-channel work, and EDA tool development for secure design.
- Cybersecurity for quantum computing: error correction, secure attack/defense methods, privacy-preserving circuit design, and anomaly detection for quantum systems.
Also recommended: public outreach and education about PQC and quantum computing security.
Long-term perspective: maintain the workshop to grow the research community across academia, industry, and government. Concerns noted included a limited PQC implementation research community in the U.S., insufficient hardware security work for quantum computing, and the need for increased investment and talent development.
Participant Demographics
- 13 invited speakers (including 2 keynotes): 9 from academia, 3 from industry, 1 from NIST.
- 3 guests from NSF attended.
- 2 student volunteers assisted with recordings and logistics.
- 2 co-chairs moderated panel discussions.
Acknowledgments
This workshop was funded by NSF grant 2453511 — Conference: Workshop Proposal for Hardware Security in the Era of Quantum Computing & Post-Quantum Cryptography.
Appendices
Guest / Speaker List
Speakers
- Aydin Aysu — North Carolina State University
- Reza Azarderakhsh — Florida Atlantic University
- Weiwen Jiang — George Mason University
- Yingjie Lao — Tufts University
- Gang Qu — University of Maryland
- Patrick Schaumont — Worcester Polytechnic Institute
- Xinmiao Zhang — Ohio State University
- Himanshu Thapliyal — University of Tennessee, Knoxville
- Jakub Szefer — Northwestern University
- Michael Bowler — Synopsys
- Nimisha Limaye — Synopsys
- Daniel Dinu — Intel
- Sanjay (Jay) Rekhi — NIST
Guests
- Paul Ampadu — Virginia Tech
- Huaiyu Dai — NSF
- Qiaoyan Yu — NSF
Co-Chairs
- Jiafeng Xie — Villanova University
- Michel Kinsy — Arizona State University